NAND Gate
Operator Menu Location: Logic Functions
Operator Bitmap:
Functional Description:
The output of the NAND Gate operator is the logical NAND of its inputs,
where y is the output, are the inputs, and n is the number of inputs. In other words, the output state is LOW if all inputs are HIGH. If any input is
LOW, the output is HIGH. Below is the truth table for a 3-input NAND-gate:
|
|
|
y |
LOW |
LOW |
LOW |
HIGH |
LOW |
LOW |
HIGH |
HIGH |
LOW |
HIGH |
LOW |
HIGH |
LOW |
HIGH |
HIGH |
HIGH |
HIGH |
LOW |
LOW |
HIGH |
HIGH |
LOW |
HIGH |
HIGH |
HIGH |
HIGH |
LOW |
HIGH |
HIGH |
HIGH |
HIGH |
LOW |
Design Pad assumes that , if input pin i is not connected.
User-Defined Properties:
Object Name. A string label that identifies the operator
Number of Inputs. The number of input pins n, where 2 <=ï€ n <=ï€ 6
Comments: None.
See Also:
AND Gate, OR Gate, NOR Gate, NOT Gate, XOR Gate, XNOR Gate